RE: Fluke compiler software

From: Chris Toseland <chris.toseland_at_raxcosoftware.com>
Date: Thu Apr 04 2002 - 10:18:00 EST

I belive it is also important to make steady progress rather than trying to
think of every enhancement we want and then build it. Just look at the
Arcade ICE or RatBox projects if you want to see what that thinking
produces.

Touche' Kev ;o)

Time for an update on (non)progress so far.

1) Trashed idea of using a cpu to generate cpu control signals as this
didn't give 'real time' control over the board. So the ICE requires a few
configuration parameters (data and address setting, whether its read or
write IO or memory) give it a start strobe and it performs 1 complete bus
cycle at cpu speed and stops. Adding an onboard CPU would give scope to loop
tests at higher speed rather than multiple requests for cycles through the
Comms I/F.

2) Now using state machines to 'Accurately' simulate CPU control signals
synchronised from UUT cpu clock. Currently have WORKING and tested state
machines for Z80 (includes selectable refresh ability) and 6502, 680X are
the next in the design pipeline. The prototypes use TTL logic the final
version will use an FPGA to make it more compact.

3) Clock(input to cpu socket) speed counter incorporated (I know someone on
here was on about that in the past weeks).

4) Re-instating the board files (memory map/ICE config info) that I dropped
from ICE Mk1.

5) All other operational features will be incorporated as per the spec page
on my now defunct website.

6) It will have RS232 when I get VB6 to talk properly as at the moment it
seems to buffer comms data all over the place (anyone who uses VB Comms, any
help would be appreciated) or I could just revert to it being parallel port
driven again.

7)Disussions where held with various interested parties over the weekend of
the last UKVAC meet, Mike Coates being one respondent getting his ear bent.
The out come from those talks
hasn't changed my hardware design (Hallelujah) but there was a request for a
Dissasembler built into the GUI and an Emulator for each CPU so that the
board can be 'run' though this would be sort of a single step mode. I see
this feature as a 'would be great to have' but it isn't a priority and may
get done sometime never.

Wow imagine that me using the work priority!

When will it be available? Don't ask I'm fitting it inbetween my studies for
the MCSE exams in 5 weeks time, after that I should be able to devote plenty
of time to it.

Thats all for now

Chris
Arcade ICE (thinker not do'er)
Received on Thu Apr 04 07:40:40 2002

This archive was generated by hypermail 2.1.8 : Tue Dec 02 2003 - 18:40:42 EST