Re: message repost

From: <jwelser_at_ccwf.cc.utexas.edu>
Date: Mon Sep 08 1997 - 12:42:00 EDT

> Yes, I have thought about this. If something in the HV shorts, or just one
> of the deflection transistors shorts, then the load will tend to look like
> Re = 0, and POW, the LV power transistors are gone! I am looking at a
> couple of possiblilities for current limiting on my LV PCB. As soon as I
> have gotten around to analyzing them, I will post up what I have found. In
> the mean time, I am open to any and all suggestions...

        OK, here's mine....Let's just model the 317 as a constant voltage
source, because, basically, that's what you're using it as, right? I'll
call it V1

                                   |
                                   |
                                  |/
              V1 o------+-------| Q1
                          | |\>
                          | |
                          / |
                          \ Rsc |
                          / |
                          \ |
                          | |
                          \| |
                      Q2 |-------+
                         </| |
                         | \
                         | / Re
                         | \
                         | /
                         | |
                         +---------+--------o Vout

        (Sorry about the horrible ASCII art -- this was actually my first
ASCII art masterpiece.)

        Here's how this works (Notice that the additions to Anders's
circuit are Rsc, Re, and Q2)

        Re is a small valued resistor, such that under normal operation,
the voltage drop across Re is virtually 0. Suppose a short happens at
Vout. The current through Re will rise, and when the voltage across Re
gets to .7, Q2 turns on (since the voltage across Re was virtually 0, the
voltage on the base of Q2 and on the emitter of Q2 is virtually equal
under normal operation, and Q2 is off.)

        When Q2 turns on, the current gets sucked through Rsc, and through
Q2 to GND (which is Vout now.) Ideally, the value of Rsc is chosen such
that most of the power is dropped across it, and it robs Q1 of its base
current, such that Q1 turns off. Rsc is a beefy power resistor, so that
it can dissipate lots of power.

        Rsc's value should be relatively large (so that the voltage on the
collector of Q2 is small, BUT above Vc-sat (.2V or so, if Vout is GND) but
small enough so that enough current flows through it to pull Q1 into
cutoff. This gets even easier if we make Q1 a power MOSFET, since there
is basically infinite impedance from G -> {D, S}

Joe

------------------------------------------------------------------
Joseph J. Welser jwelser@ccwf.cc.utexas.edu
Design Engineer -- Crystal Semiconductor Corporation
Ph.D. Student in E.E. -- University of Texas at Austin
Work: jwelser_at_crystal.cirrus.com http://www.crystal.com
P.O. Box 17847; Austin, TX 78760
------------------------------------------------------------------
Received on Mon Sep 8 09:42:16 1997

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