Re: FPGA

>The Cinematronics CPU has 256x12 bits of SRAM with separate Din & Dout.
>Zonn probably has the know-how to redesign the ROM interface to work
>with only 1 ROM which would reduce the number of pins by 8, so you'd
>need ummm 12x2 (vectors) + 6 (sound) + 15+8 (rom bus) + 24(DIP/CTRLS)
>= about 77 IOs. If you keep the IO multiplexing off the chip (which
>could work with the control panel FPGA), you'd need about 18 less or
>aproximately 60 IOs. Hmmmm YUK. If you could find A/Ds with built in
>latches, you could multiplex the XY data to get down near 50 IO. The
>rest of the board is about 125 74xx parts.

Ugggh. Boy, it's stuff like that that just kinda makes you want to make a
functional equivalent instead. Then you get back into the debate that a
486/33 w/ motherboard is only about $50 and if you add in an ISA or
Parallel Port Vector Generator card like Zonn and I are doing... ;-)

>What would be really nice is a VHDL implementation - wasn't someone
>working on that?

I think Steve did that? Someone had a VHDL or Verilog model of it almost
done. Was is Joe?

-Clay

Clayton N. Cowgill Engineering Manager
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Received on Mon Oct 6 10:32:45 1997