Re: Sega Multigame and Vector Generator Card...

From: Paul Kahler <phkahler_at_Oakland.edu>
Date: Tue Dec 16 1997 - 17:05:09 EST

> Moving "fractional" portions of pixels/dots/whatever is handy for
> rate-control and makes really fluid movement easy from the software side.
> Just gives you some easy dynamic range to play with. No real reason to
> "need" it though.

Well ya, you need fractional pixels/dots to get variable slope without
using bresenham.

> Actually, I bet the dot size of the (focused) beam on a 19" raster tube is
> probably larger than the lower bit or two of resolution from a 12bit DAC.
> (Not to mention the shadow-mask.)

Good point. But some may want to run on a B/W monitor and then you need
all the resolution you can get. That wouldn't be me though.

> This is really just the Sega G-80 vector generator at this point.

It's also a direct digital implementation of the AVG.

> >If you add (ddx,ddy) to (dx,dy) each itteration, you'll be able to do
> >parabolas (don't try this with an analog version :) and so-on to the
> >higher order curves... These start to want more precision, but maybe not
> >any more bits i.e. ddx = +/- 0.0000xxxxxxxxx to be added to dx. This type
> >of thing would be WAY cool but would complicate things quite a bit unless
> >you start routing all the data through the same adder! How's this:
> >
> >Add dx,ddx
> >Add dy,ddy
> >Add X,dx
> >Add Y,dy
> >dec Count
> >loop Count>0
> >Output (int(X), int(Y))
>
> That looks do-able, but at a synthesis level I'll actually need an adder
> and a subtractor that gets selected based on the sign of the delta's. A
> 2-bit full-carry lookahead adder cell cascaded to make a 12 bit adder takes
> 28 macrocells... A full 24bit adder and subtractor might take the better
> part of a 128 macrocell CPLD by themselves. Well, as long as I do it in
> VHDL I should be able to retarget to an FPGA is worse comes to worse...
> Xilinx 4000 series parts are really cheap now...

You don't need a subtractor. The PC can output 2's complement numbers for
the deltas. An adder can't tell weather it's adding 4095 or -1, they are
the same 12-bit number (This also works in fixed point). That's why I say
it'd be nice if you could use a single 24-bit adder and sequence the
registers though it. Can you fit a 4x24 or 6x24 register file, a 24bit
adder, and the control stuff all on the chip?

> >I'll let ya know if anything else hits me ;-)

It just hit me! The 2nd order system (using ddx & ddy) would allow
another feature: Variable intensity along a line. Rather than using
them to draw a curve, you could use them to simply alter the speed
of a straight line draw. It'd be cool to have vectors that fade to
black (as the beam speeds up). Oh, but all the features of a 2nd order
system could only be used in NEW vector games, and no one would ever
want to write one of those ;-)

-- 
 ___   __   _   _  _
|   \ /  \ | | | || |       phkahler@oakland.edu     Engineer/Programmer
|  _/| || || |_| || |__     " What makes someone care so much?
|_|  |_||_| \___/ |____)      for things another man can just ignore. " -S.H.
Received on Tue Dec 16 14:02:38 1997

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