RE: 2114's ->RE: BattleZone probs....

From: Clay Cowgill <ClayC_at_diamondmm.com>
Date: Mon Jan 18 1999 - 15:48:37 EST

> At my Real Job a few years ago I had to figure out why
> some newly built units were showing scrambled data on
> the display. What I found out was that they had replaced
> the original (obsolete) RAM with some new (incredibly
> fast Cyprus) RAM. The system had a built-in 12 nS
> glitch on the write line that the old RAM ignored. But
> 12 nS was a perfectly valid write for the new RAM.
> And the glitch happened when the data wasn't valid.
>
Yep, same sort of thing happened to us bringing up an FPGA design for a
USB controller. We had spec'd a 74LS00 for some signal decoding. We
used some 74HCT00's we had on hand on the protos. Turns out that we
were getting about a 2ns glitch from using one of the gates as in
inverter before going to another gate. The glitch was still seen by our
(massively overkill) 100's of MHz FPGA and we were getting "double
reads" as a result. (So a register dump showed every other register...
Weird.) None of us could believe that a 2ns glitch was *possible* from
an HCT part so is was a couple days worth of debugging before we finally
decided it was the cause...

Switching to the slower part cured the problem. I'd seen a similar
problem when replacing the 72LS244's on the Star Wars CPU board (the one
that connects to the AVG and SND board bus) with some 74F244's I had
around. Using the LS part were fine-- F244's were not.

-Clay
Received on Mon Jan 18 14:48:49 1999

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