Re: ARGGGGG

From: Jess Askey <jess_at_magenta.com>
Date: Tue Aug 24 1999 - 01:49:06 EDT

> David Shoemaker wrote:
> I could taste the problem in the BZ too. While doing a read of vector memory
> location 0 (0x2000) I was getting all low on the AMx lines except AM0 and
> AM1. They were toggling. When I went to check there source in the VG address
> selector my pod died. The correct chip select lines were set.

Well you have to be careful with checking the address lines on the VGRAM and ROM
since their state depends on if the CPU is trying to access them. That is what
the Vector Generator Address Selector does. But if your CPU was taken out and
you were just using the 9010A, then that sounds odd. Maybe the problem is that
the Vector Program Counter cannont count past 0x03. that would lead to the LS193
counters at E5,F5,H5 (Red Baron schems is as close as I could find).

>
> Was I on the right track or does the memory read circuitry have to read a
> section of memory and discard the rest, that's how page mode memories work
> right? But I wouldn't think that a 2114 was like that Hell I don't know
> getting over my head again.

Im not too sure what you mean about all that. Also, did you read the docs on my
site at http://www.gamearchive.com/video/general/hacking/text/avg.txt They may
help or at least really confuse you since I wrote them in a hurry one night at
2 am.

I also found a doc that I wrote up. I can't really make sense of it right now
but I scanned it and put it up at..

http://www.gamearchive.com/video/general/hacking/text/vec_states.pdf

The quality is far from good but I need to go to bed so I can't work on it
tonight. The 'operations' listed should correspond with the ones in my
AVG description(previous link).

Looks like your top 3 bits get transferred to the PROM with Latch1. You will
notices that 'latch1' is also the first step of every operation. That way
the SM can find out what it needs to do. Others look to do the following...

Latch 0 - transfers next byte to VYD7-D0
Latch 1 - Transfers next byte to PROM and VYD12-D8
Latch 2 - Transfers next byte to VXD7-D0
Latch 3 - transfers next byte to ZREF bits & VXD12-D8

Strobe 0 - ??
Strobe 1 - ?? Can't remember these right now.
Strobe 2 - ??
Strobe 3 - ??
Received on Tue Aug 24 00:50:48 1999

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