Re: black widow pcb problem no play no picture clock working

From: Daniel Piraino <dpiraino_at_twcny.rr.com>
Date: Sat Aug 06 2005 - 21:40:05 EDT

  I checked the address buffers. They are both stuck in a low state. I
probed the LS244 at E2 and it had no activity and it was causing pins 26
to 33 of the CPU to be inactive too. I changed it , but it didnt make
the game come up. All it did was make all the dead lines go to a high
state. So there is still trouble somewhere. I grounded the WDDIS but
that didnt change anything.
Not sure where to go from here.
Dan Piraino

Daniel Piraino wrote:

> I put the game in self test but nothing changed. Its not responding. I
> checked the cpu a few times. I havent documented specific lines but
> none of them are pulsing. The lines are either stuck high or low. I
> will check the cpu to address buffer lines, tomorrow, to see if their
> either high or low. Does it mean anything specific when a line is
> stuck high compared to when a line is stuck low, other than no data is
> being transfered? Or is just a roll of the dice where the address line
> stops pulsing( either in a high or low state)? Unfortunately I dont
> have a cat box or a signature analyzer. All I have is my probe and my
> DMM. I had a Fluke 9000 at one time but sold it.
> I couldnt figure out how to use it, I only had a Z80 pod for it and I
> couldnt get a pod for the 6502 without paying alot for it. So off it went.
> Thanks Matt,
> Dan Piraino
>
> Thank you Peter Jones for the explaination on the watchdog. Yes, I
> have the monitor disconnected for these tests.
>
> Matt Rossiter wrote:
>
>>Disabling the watchdog circuit won't hurt anything. If you disable the
>>watchdog and the game comes up, then you know that the problem is only in
>>the watchdog circuitry. You might want to look at the Schematics and start
>>from the CPU (6502). Use your logic probe to check the Data and Address
>>lines, particularly at the address buffers (74LS244) which typically fail.
>>Make sure nothing is stuck high or low. Did you put the game in self test?
>>What does it do? I can't remember what you said in your first post.
>>
>>My method of choice when I've tried the above, is use my signature analyzer.
>>It's easy to make a 6502 NOP fixture and I mapped out the signatures for
>>Black Widow from a working boardset. You just need a signature analyzer or
>>a cat box.
>>
>>Matt
>>
>>
>>
>>----- Original Message -----
>>From: "Daniel Piraino" <dpiraino@twcny.rr.com>
>>To: <vectorlist@vectorlist.org>
>>Sent: Friday, August 05, 2005 3:15 PM
>>Subject: Re: VECTOR: black widow pcb problem no play no picture clock
>>working
>>
>>
>>
>>
>>> Ok, nobody replied to that last one. I must have made it too confusing.
>>>Well Tony Jones told me to remove the CPU and check to see if the clock
>>>and the reset are working. I checked with the logic probe and I get
>>>pulsing from the clock. So I assume thats working. I checked the reset
>>>signal lines and their at a constant low state. There are lines from
>>>counters E4 and F4 that go to F7 (74LS14) that are marked POR(power on
>>>reset)on the schematic. Those lines are at a constant high state.
>>>Can anyone tell me what the reset should be doing?
>>>The only thing on this board that seems to be doing anything is the
>>>clock. Everthing else is either at a constant high or a constant low
>>>I am not familiar with how the watchdog works or the power on reset for
>>>that matter. I assume that the watchdog comes on whenever there is a
>>>problem on the board and stops anything else from being damaged (like
>>>the monitor).
>>>If I disable the watchdog, by putting the WDDIS test point to ground,
>>>will that hurt anything? Will it get the game running again so I can see
>>>whats going on?
>>>Or is that not the right direction to go in?
>>>I wish someone would put out an atari vector pcb repair and
>>>toubleshooting FAQ.
>>>I looked through the vector list archive and I have found nothing that
>>>could help me.
>>>I can stare at this schematic all day long and not make heads or tails
>>>of whats going on.
>>>I have no idea what test signals I should be getting with the logic probe.
>>>Well if someone could give me a little info I would appreciate it.
>>>I sure need it
>>>Dan Piraino
>>>
>>>Daniel Piraino wrote:
>>>
>>>
>>>
>>>>Checked clock and reset signal
>>>>
>>>>I removed the CPU
>>>>
>>>>I probed the clock and it is pulsing normally all the way up to pin 5
>>>>of E4 counter(74LS193).
>>>>
>>>>The POR is high when it exits pin 14 of E4 counter (74LS193) and pins
>>>>2 and 12 of F4 counter (74LS393) and enters F7 (74LS14) at pins 4 and 5.
>>>>
>>>>But once it exits F7 (74LS14) at pin 3 and 6. It becomes low where it
>>>>goes out to R8 (TL082), E3 (74LS00), K3 (74LS74) and the POR test
>>>>point. It remains low from pin 4 of R8 (TL082) out to the reset.
>>>>
>>>>pin 3 of E3 (74LS00) goes out high to H4 counter (74LS393), as it
>>>>exits pins 6 and 13 of H4 counter (74LS393) it goes low out to K3
>>>>(74LS74) and F4 counter (74LS393).
>>>>
>>>>Pin 9 of L4 (74LS08) is high out to the WDDIS test point. Pins 8 and
>>>>10 of L4 (74LS08) are low.
>>>>
>>>>Well I hope thats understandable. Its the only way for me to describe
>>>>whats happening,
>>>>
>>>>Hope someone can help
>>>>Thanks,
>>>>Dan Piraino
>>>>
>>>>-----Original Message-----
>>>>From: Daniel Piraino <dpiraino@twcny.rr.com>
>>>>To: vectorlist@vectorlist.org
>>>>Date: Tue, 02 Aug 2005 23:49:32 -0400
>>>>Subject: Re: VECTOR: black widow xy monitor problem
>>>>
>>>>
>>>>
>>>>> The reset tests low with the logic probe
>>>>>Thanks,
>>>>>Dan Piraino
>>>>>
>>>>>Daniel Piraino wrote:
>>>>>
>>>>>
>>>>>
>>>>>> The board set is not working
>>>>>>
>>>>>>
>>>>get the schematics from the web.
>>>>use the logic probe to check the clock and reset signal.
>>>>i know you said it is low, but check it from end-to-end.
>>>>if the clock seems dead from the begining then replace the crystal.
>>>>
>>>>once the clock and reset are good we can move forward.
>>>>
>>>>
>>>>
>>>--------------------------------------------------------------------------
>>>
>>>
>>-
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>>
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>>>>chris@westnet.com
>>>>
>>>>
>>>>
>>>>
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>>>
>>>
>>-
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>>
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>>>>
>>>>
>>>>
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>>>** Please direct other questions, comments, or problems to
>>>
>>>
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>>>
>>>
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Received on Sat Aug 6 21:40:16 2005

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