AVG register file depth (!?!)

Hey all,

Ok, so who can answer this.. Jed Margolin's notes on the AVG specify that
the stack/register file is only 3 levels deep, his schematics and the
replacement boards use a 4 level deep register file. From testing, but
only with spaceduel as I still have to fix my blackwidow boardset ;), a
3 level deep stack appears to works fine...

So anyone know if anything makes use of more than 3 levels of stack ???

Why I'm interested ? I've developed a VHDL model for the AVG that'll fit
nicely into a 5v Xilinx XC95108 CPLD which will be published as freeware
very very shortly. A 3 of 4 level deep stack fits just fine into the 108
cell device so it's really just academic interest at this point.

- James

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Received on Sun Aug 27 18:13:27 2006