Re: Tempest Schematic error?

From: Rodger Boots <rlboots2_at_gmail.com>
Date: Sat Jun 26 2010 - 21:52:03 EDT

Printing 1 schematics show same thing, no pin 1-2 connection and chip is an
LS194.

On Sat, Jun 26, 2010 at 8:48 PM, Rodger Boots <rlboots2@gmail.com> wrote:

> The schematics I pulled up say F5 is an LS194 with pin one being LATCH1
> (inverted) and pin 2 going to P R15. But there is a connection dot at pin 1
> and I am using printing 2 of the schematic, so on printing 1 they MIGHT have
> been incorrectly connected together.
>
>
> On Sat, Jun 26, 2010 at 6:33 PM, Kevin Moore <talon.k@gmail.com> wrote:
>
>> So I was looking through the schematics today, and it seems that there is
>> a problem in the vector-generator data shifter section. Specifically with
>> F5. Perhaps I'm just confused, so I thought I would ask and see. But it
>> looks to me like pins 1&2 are tied together. Instead of having /Latch1 going
>> into pin 1.
>>
>> Also could someone explain to me what the P,R15, and P,R31 lines are?
>>
>> Thanks,
>>
>> Kevin
>>
>>
>

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Received on Sat Jun 26 21:52:48 2010

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